Computer systems typically employ a large number of storage registers connected to a central operational element known as an arithmetic logic unit (ALU). When a micro-operation is performed, the contents of particular registers are provided to the inputs of the ALU. The ALU performs the operation to obtain a result, which is then provided to a destination, which typically is a register.
Typically, the ALU is implemented as combination logic facilitating a register transfer operation from source registers via the ALU to destination registers, in one clock (pulse) time period by way of example. One problem with conventional ALUs is that they do not adequately address the situation where the value stored in a register is used by an instruction to obtain a result, and the value is overwritten with the result, even though the value may be needed for subsequent instruction(s).
Conventional processing systems attempt to address this situation by restoring the value of the register that has been overwritten so that a subsequent instruction may use the value. This approach is undesirable because the overwriting and reloading of this intermediate value increases processing throughput. As such, there is a need for a solution where the ALU preserves the register value, but in a manner that does not affect overall computational processor throughput.